1. Field of the Invention
The present invention relates to a semiconductor device and a method of manufacturing the same, and more particularly to a self-extinguishing type semiconductor device such as a GTO (gate turn-off) thyristor, an SI (static induction) thyristor, and an IGBT (Insulated Gate Bipolar Transistor) power transistor, and to a method of manufacturing such a self-extinguishing type semiconductor device.
2. Description of the Related Art
A self-extinguishing type semiconductor device such as GTO thyristor, SI thyristor or IGBT has been widely used as a power semiconductor device and has been described in the following documents.
1. Junichi Nishizawa: "Development of High Power Static Induction Transistor", Report on Researches subsidized by Agency of Industrial Science & Technology of MITI (1969) PA0 2. Junichi Nishizawa: "High Power Vertical Type Junction FET having Triode Characteristics", Nikkei Electronics, Sep. 27, 1971, pp. 50-61 PA0 3. J. Nishizawa, T. Terasaki and J. Shibata: "Field-Effect Transistor versus Analog Transistor (Static Induction Transistor)", IEEE Trans. on Electron Device, ED-22(4), 185 (1975) PA0 4. J. Nishizawa and K. Nakamura: Physiquee Appliquee, T13, 725 (1978) PA0 5. J. Nishizawa and Y. Otsubo: Tech. Dig. 1980 IEDM, 658 (1980) PA0 6. J. Nishizawa, T. Ohmi, T. Sha and K. Mototani; Technological Report of the Electron and Communication Society, ED81-84 (1981) PA0 7. M. Ishidoh, et al: "Advanced High Frequency GTO", Proc. ISPSD, 189 (1988) PA0 8. B. J. Baliga, et al: "The Evolution of Power Device Technology", IEEE Trans. on Electron Device, ED-31, 1570 (1984) PA0 9. M. Amato, et al: "Comparison of Lateral and Vertical DMOS Specific On-resistance", IEDM Tech. Dig., 736 (1985) PA0 10. M. S. Adler: "Modern Power Device", John Wiley Sons, 350 (1987) PA0 11. H. Mitlehner, et al: "A Novel 8 kV Light-Trigger Thyristor with Over Voltage Self Protection", Proc. ISPSD, 289 (1990)
Among the conventional self-extinguishing types of semiconductor devices, the GTO thyristor and SI thyristor are known to have an embedded gate-type structure which can be obtained by forming a gate region in a surface of a semiconductor substrate and then providing an epitaxial layer on that surface. In such GTO thyristors and SI thyristors, since the epitaxial growth has a substrate dependency, the epitaxial layer formed on the surface of the semiconductor substrate, in which the gate region is provided in advance, has such defects that crystals grown on the gate region are different from those on the other portions, and that a uniform impurity-concentration distribution is not obtained. As a result, it has been difficult to obtain a semiconductor device having good characteristics. In addition, since the epitaxial growth is a relatively time-consuming process, it lowers the throughput of the semiconductor device. Furthermore, there is still another problem that the conductivity type of the epitaxial layer in a vicinity of the gate region is likely to be inverted. To solve these problems, a surface gate-type structure has been proposed. However, an SI thyristor having this surface gate-type structure cannot have a large reverse voltage and thus, it fails to have a large depletion layer. Accordingly, the SI thyristor with this structure cannot cut off a large current.
When the surface gate-type structure is utilized in a GTO thyristor, there is a further problem, in addition to those mentioned in the case of SI thyristors, in that the gate region cannot have a high impurity-concentration. This results in a low carrier drawing speed and greater turn-off loss and thus, a high frequency property cannot be obtained in the GTO thyristor with this structure.
With respect to an IGBT, it has been known that a cathode and a gate are usually formed on the same surface of a semiconductor substrate. Accordingly, it is not possible for the IGBT to have a cathode covering the entire surface of a semiconductor substrate, because a gate must also be formed in the same surface of the semiconductor substrate. As a result, the IGBT involves problems in that the total cathode area is small and cathode electrode wiring is not easily constituted by a single metal film. This also means that the device cannot be cooled at both surfaces thereof. Because of these problems, the IGBT having the surface gate structure cannot sustain a large electric current.
As a solution for these problems, there has been proposed a serrated gate-type structure. This structure is constituted by forming a groove on a surface of a semiconductor substrate and then, providing a gate region in a bottom portion of the groove. However, it is difficult to accurately form a deep groove by dry etching, and this leads to poor breakdown voltage. It is also difficult to conduct precise machining in this serrated gate-type structure.
As another solution for the above-mentioned problems, the present applicant has proposed, in U.S. patent application Ser. No. 08/407,023 as well as corresponding European Patent Application No. 94 921826.7, a manufacturing method of a semiconductor device comprising the steps of forming recesses or depressions in a surface of a first semiconductor substrate of one conductivity type, forming gate regions of the opposite conductivity type at bottoms of the recesses by introducing impurities from the bottoms of the recesses, providing gate electrodes on the respective gate regions, and joining a second semiconductor substrate to the surface of the first semiconductor substrate. Semiconductor devices having this joined or contacted structure are free from various problems caused by epitaxial growth. Specifically, in a GTO thyristor, since a gate region can include impurities at a high concentration without any difficulty, the carrier drawing speed can be increased correspondingly and thus, the high frequency property can be attained easily. In an SI thyristor, since gate regions having a high impurity-concentration can be uniformly embedded within a semiconductor substrate, the resulting thyristor includes large total gate region area. With respect to an IGBT having this contacted structure, the cooling efficiency is greatly improved because this structure enables the IGBT to have a cathode covering the entire surface of a semiconductor substrate. As a result, the IGBT with this joined structure can sustain a flow of large electric current.
These semiconductor devices having the above-described joined structure can be produced by simpler manufacturing process, but the characteristics of the device are not improved very much when compared with the conventional semiconductor devices having the embedded gate-type structure, for which epitaxial growth is utilized, or those having the serrated gate-type structure. Namely, even in the semiconductor device having the joined structure, the electric current flowing within a channel cannot be cut off more completely without greatly decreasing the gate resistance.
In addition, since a hollow space is formed above the gate region in the joined structure-type semiconductor device, the device may sometimes fail to have a sufficient mechanical strength, and the gate region is likely to be contaminated with undesired impurities, which may cause a deterioration in the device properties. The hollow space also decreases the cooling efficiency of the device.